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Principles of Verifiable RTL Design: A functional coding style supporting verification processes in Verilog Lionel Bening 2nd ed. 2001 edition
Principles of Verifiable RTL Design: A functional coding style supporting verification processes in Verilog
Lionel Bening
System designers, computer scientists and engineers have c- tinuously invented and employed notations for modeling, speci- ing, simulating, documenting, communicating, teaching, verifying and controlling the designs of digital systems.
282 pages, biography